<architecture, processor> The sequence of actions that a
central processing unit performs to execute each machine
code instruction in a program.
At the beginning of each cycle the CPU presents the value of
the program counter on the address bus. The CPU then
fetches the instruction from main memory (possibly via a
cache and/or a pipeline) via the data bus into the
instruction register.
From the instruction register, the data forming the
instruction is decoded and passed to the control unit which
sends a sequence of control signals to the relevant function
units of the CPU to perform the actions required by the
instruction such as reading values from registers, passing
them to the ALU to add them together and writing the result
back to a register.
The program counter is then incremented to address the next
instruction and the cycle is repeated.
The fetch-execute cycle was first proposed by John von
Neumann.
