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Fairchild F8 definition

<processor> An 8-bit microprocessor. The processor itself had no address bus - program and data memory access were contained in separate units, which reduced the number of pins and the associated cost. It also featured 64 registers, accessed by the ISAR register in cells (register windows) of eight, which meant external RAM wasn't always needed for small applications. In addition, the 2-chip processor didn't need support chips, unlike others which needed seven or more.

The F8 inspired other similar CPUs, such as the Intel 8048. The use of the ISAR register allowed a subroutine to be entered without saving a bunch of registers, speeding execution - the ISAR would just be changed. Special purpose registers were stored in the second cell (regs 9-15), and the first eight registers were accessed directly. The windowing concept was useful, but only the register pointed to by the ISAR could be accessed - to access other registers the ISAR was incremented or decremented through the window.

(1994-11-16)

 


Nearby terms: failure « failure-directed testing « FAIR « Fairchild F8 » fall back » fall forward » fall over
   

 

 
 
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